For over 50 years, the number of transistors formed on an integrated circuit has doubled approximately every two years. This two-year-doubling trend, also known as Moore's Law, is projected to continue, with devices formed on semiconductor chips shrinking from the current critical dimension of 20-30 nm to below 100 Angstroms in future fabrication processes currently being designed. As device geometries shrink, fabrication geometries grow. As the 300 mm wafer replaced the 200 mm wafer years ago, the 300 mm wafer will shortly be replaced by the 400 mm wafer. With processing of large area semiconductor substrate growing in sophistication, even larger fabrication geometries for logic chips may be within reach.
Uniformity in processing conditions has always been important to semiconductor manufacturing, and as critical dimensions of devices continue to decline and fab geometries increase, tolerance for non-uniformity also declines. Non-uniformity arises from numerous causes, which may be related to device properties, equipment features, and the chemistry and physics of fabrication processes. As the semiconductor manufacturing industry progresses along Moore's Law, there is a continuing need for fabrication processes and equipment capable of very uniform processing.